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Job Description:

Module-level architecture definition and design;

Module-level RTL implementation;

Simulation/Verification at both module level and system level;

Module-level synthesis and timing analysis;

Write design spec and report;

FPGA/silicon debug on related modules.

Qualification:

Bachelor degree or master degree in ASIC design relevant;

2+ years of SoC design experience;

Solid knowledge on digital IC design;

Strong skills of Verilog RTL coding and simulation;

Hands-on experience in EDA tools, such as Cadence and Synopsys tools;

Familiar with C language;

Understanding the basic principles of graphics, and having the experience of integrating graphics engineer is a plus.

HR Contact: hr@montage-lz.com

Job Description:

Module-level architecture definition and design;

Module-level RTL implementation;

Simulation/Verification at both module level and system level;

Module-level synthesis and timing analysis;

Write design spec and report;

FPGA/silicon debug on related modules.

Qualification:

Bachelor degree or master degree in ASIC design relevant;

2+ years of SoC design experience;

Solid knowledge on digital IC design;

Strong skills of Verilog RTL coding and simulation;

Hands-on experience in EDA tools, such as Cadence and Synopsys tools;

Familiar with C language;

Familiar with HDMI 1.4 protocol, understanding HDMI2.0 is better;

Experience in developing TV or STB chip is a plus.

HR Contact: hr@montage-lz.com

Job Description:

Circuit design for IC blocks, such as VCO, XO, analog/digital PLL, LO, PDET, BG, or LDO, based on block design specification;

Circuit simulation and post-layout simulation for the IC blocks in SpectreRF/ Spectre and/or AMS over PVT;

Layout floor planning and support for layout design of the IC blocks;

Test planning and characterization of the IC blocks in Lab and ATE environments;

IC block topology and specification together with chip design leader and system engineer;

Coordination of IC block and interface design and simulation with IC design engineers.

Qualification:

Master or above in Microelectronics, Solid-State Electronics, Microwave Technique;

At least 3 years in PLL IC design and MS or PhD in electric and electronic engineering;

Understanding submicron CMOS technologies and devices; Familiar with PLL block circuits and their analysis; Analog layout technique, PCB circuit and layout design; Test instrument and characterization of IC blocks in Lab & ATE environments;

Familiar with Simulation tools like Spectre/SpectreRF and AMS; Matlab & Simulink modeling and simulation;

Fluent in English reading and writing;

Good communication and interpersonal skill.


HR Contact: hr@montage-lz.com

Job Description:

Circuit Design for analog IPs such as PLL, DDR, USB, HDMI, Audio codec, high-speed & high-resolution data converters(ADC, DAC), high speed IO, high-precision-bandgap, power supply regulators, etc;

Write design SPEC and conduct feasibility research for advanced IP in above areas;

Oversee layout and verification activities which include floor- plan, LVS and DRC.

Qualification:

Bachelor degree or Master degree in ASIC Design Relevant;

2 years above in Analog IC design;

Deep knowledge of analog circuit design such as bandgap, LDO, PLLs, ADC, high-speed ser-des, IO;

Experience in Matlab;

Ability to do layout and provide verification/debugging guidance;

Creative thinker, capable of finding an appropriate solution to complex problems;

Self-driven and proactive;

Team player, able to work in a cross-functional-team environment.


HR Contact: hr@montage-lz.com

Job Description:

Guide and review the customer circuit design and PCB layout, and help resolve the issues that the customers encounter during hardware design;

Customer prototype testing, problem solving, test report generation, including helping customers answer the questions arising during the product test;

Verificaiton test of the chip and various modules, hardware development for the verification board, development of the testing program, problem debugging, and verification report generation;

Collaborate the software department in debugging the hardware related issues, and verify whether the software control over the hardware is correct.

Qualification:

Bachelor or above in electrical enginnering/communication enginnering/automation enginnering/Computer Science;

At least 5 years' experience in hardware development, chip/IP verification test or application;

Familiar with the audio/video specifications, audio/video standards and testing methods, and how to use the audio/video testing devices; familair with the mechanism, electrical characteristics, and the testing methods of the high-speed signals including

HDMI, USB, Ethernet, and DDR/DDR2/DDR3; familiar with the design rules such as signal integrity and electromagnetic compatibility, and experienced with its design and problem solving; master the electronic circuit expertise and how to use the EDA tools including Cadence and Pads;

Familiar with C or Python. Expeirnece in programming is a plus;

Good at experimenting and observing, clear thinking, logical mind, self-motivated.


HR Contact: hr@montage-lz.com

Job Description:

Work out test plan with designer; Develop test hardware and software on ATE to support mass production and engineering;

Correlate test result between ATE and bench; Do ATE test repeatability and distribution study to make sure the robustness of the testing;

Support DE/AE to fulfill device evaluation for new product on functional patterns and DC/AC parameters to guarantee the parameters meet design target or datasheet spec;

Transfer ATE test hardware and software to subcon and share the knowledge to manufacturing engineers; Sustain the production line by trouble shooting any abnormality in the line;

Optimize ATE testing or migrate to suitable platform to improve test coverage, reduce test time/cost and enhance testing performance.

Qualification:

Bachelor Degree or above, Major in Electronic Engineering or related;

>3 years of consumer electronics working experience;

Be Familiar with Basic knowledge about digital and analog circuit and C language or other programming language;

Have experience with Working experience on IC testing or design、FPGA experience、High speed test experience、ATE debugging skill;

Good written and oral communications skills;

Process a good sense of responsibility and positive working attitude.


HR Contact: hr@montage-lz.com

Job Description:

Complete new device qualification (Burn-In, Life Test, ESD, Latch-Up) per device requirement and release to production;

Support device characterization testing and maintain to enhance test yield and quality of devices in both wafer sort and final test;

Undertake and manage projects to reduce product cost and cycle time, improve production efficiency and work on all issues related to device performance.

Qualification:

B.S Degree ,Major in Electronics/Electrical Engineering;

Knowledge of device and ATE testing is essential;

>3 years of consumer electronics working experience;

Working experience in fast pace semi-conductor manufacturing environment;

A good sense of responsibility and positive working attitude;

Good written and oral communications skills;

Able to understand, debug, modify and improve test program;

Experience in Mixed Signal or Memory testing is preferred.


HR Contact: hr@montage-lz.com

Job Description:

Module-level architecture definition and design;

Module-level RTL implementation, synthesis;

Simulation/Verification at both module level and system level;

Writing design spec and report;

FPGA/Silicon debug on related modules.

Qualification:

Bachelor degree or Master degree in ASIC Design Relevant;

New graduate or above;

Solid knowledge on digital IC design;

Strong skills of Verilog RTL coding and simulation;

Hands-on experiences on EDA tools, such as Cadence and Synopsys tools;

Familiar with C language;

Relevant experiences on peripheral module design, such as DDR, Flash.


HR Contact: hr@montage-lz.com

Job Description:

Perform and/or lead various DFT tasks for the creation of SOC chips. The main areas of focus will be to architect, develop and optimize structured test solutions using DFT insertion and ATPG tools as well as BIST for memories, etc.

Be responsible for architecting and integrating DFT structures into RTL and netlists to deliver reliable, efficient and high quality manufacturing test coverage.

Qualification:

Architect DFT strategies for complex SOC designs

Generate and insert Scan, Memory BIST, Boundary Scan, Test Compression etc.

Generate ATPG vectors for stuck-at, transition fault and other types

Determine, analyze and enhance fault coverage to achieve target test quality

Interface with ATE test engineer

BS/MS in Electrical or Computer Engineering with 2+ years’related experience designing DFT for SOCs

Good knowledge of DFT including scan, boundary scan, BIST, fault models and ATPG

Skill and efficiency in scripting using common UNIX scripting languages such as TCL, Perl, Python,csh

Excellent RTL and gate level debug skills

Strong experience with Verilog RTL design and simulation

Desirable: Previous use/experience with ATE

Desirable: Formal analysis / STA Experience.


HR Contact: hr@montage-lz.com

Job Description:

Collect function points from design specification, generate/run/debug test cases on FPGA;

Build up and maintain FPGA test platform;

Port ASIC to FPGA and generate bit file, including simulation, synthesis and P&R;

Help to develop driver for modules and silicon chip bring up, validation and debug.

Qualification:

Bachelor or Master in Electronics Engineering or related;

3+ years in hardware design/debug;

Familiar with Digital TV, Digital Video Broadcast system, Set Top Box, MPEG decoder, TV display and audio system;

Familiar with C programming under Windows or embedded RTOS;

Good in digital and analog circuit design and debug;

Familiar with lab equipments, such as oscilloscope, logic analyzer, spectrum analyzer, etc;

Knowledge of PLD/FPGA design flow using Verilog/VHDL and EDA tools such as Xilinx ISE, Altera Quartus;

Experience in PCB schematic or layout is a plus;

Good English writing and reading skills.

Capability of RTL coding; able to port ASIC RTL to FPGA required platforms;

Proficient in bit file generation;

Able to develop the daughter board schematic diagram (PCB schematic diagram) for FPGA testing;

Fundamental C/Assembly software development capability;

Experience in the peripheral devices such as USB/Ethernet/HDMI/UART/I2C/SDIO.

HR Contact: hr@montage-lz.com

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